Addressing Modes and Formats

These are the type of  Addressing Modes :

i) Immediate
ii) Direct
iii) Indirect
iv) Register
v) Register Indirect
iv) Displacement (Indexed)
iiv) Stack

Immediate Addressing 

This "addressing mode" does not have an effective address, and is not considered to be an addressing mode on some computers. This addressing is the simplest form of addressing which operand is part of instruction.

( Operand = address field )

Example: ADD 5

Add 5 to contents of accumulator

5 is operand

This mode can be used to define and use constants or set initial values of variables

Typically the number will be stored in twos complement form

The leftmost bit of the operand field is used as a sign bit

Advantage:

no memory reference other than the instruction fetch is required to obtain the operand, thus saving one memory or cache cycle in the instruction cycle

Disadvantage:

The size of the number is restricted to the size of the address field, which, in most instruction sets, is small compared with the word length

Direct Addressing

This requires space in an instruction for quite a large address. It is often available on Complex instruction set computing (CISC) machines which have variable-length instructions, such as x86.

Address field contains address of operand
Effective address (EA) = address field (A)

Example:  ADD A
Add contents of cell A to accumulator
Look in memory at address A for operand
Single memory reference to access data
No additional calculations to work out effective address
Limited address space

Indirect Addressing

Any of the addressing modes mentioned in this article could have an extra bit to indicate indirect addressing. Indirect addressing may be used for code or data. It can make implementation of pointers or references or handles much easier, and can also make it easier to call subroutines which are not otherwise addressable. Indirect addressing does carry a performance penalty due to the extra memory access involved.

Memory cell pointed to by address field contains the address of (pointer to) the operand

EA = (A)

Look in A, find address (A) and look there for operand

Example: ADD (A)

Add contents of cell pointed to by contents of A to accumulator

Advantage:

For a word length of N an address space of 2N is now available

Disadvantage:

Instruction execution requires two memory references to fetch the operand

One to get its address and a second to get its value

May be nested, multilevel, cascaded

Example: EA = (((A)))

Disadvantage is that three or more memory references could be required to fetch an operand

Hence slower

Register Addressing 

This "addressing mode" does not have an effective address and is not considered to be an addressing mode on some computers. Similar to direct addressing, the only difference is that the address field refers to a register rather than a main memory address.

Operand is held in register named in address filed

EA = R

Advantages:

Only a small address field is needed in the instruction

No time-consuming memory references are required

Disadvantage:

The address space is very limited

Register Indirect Addressing

The effective address for a Register indirect instruction is the address in the specified register.Similar to indirect addressing. The only difference is whether the address field refers to a memory location or a register

EA = (R)

Operand is in memory cell pointed to by contents of register R

Advantages and limitations:

-Basically same as indirect addressign

-Address space limitation of the address field is overcome by having that field refer to a word-length location containing an address

-Uses one less memory reference than indirect addressing

Relative Addressing

A version of displacement addressing. The effective address for a relative instruction address is the offset parameter added to the address of the next instruction. This offset is usually signed to allow reference to code both before and after the instruction.

R = Program counter, PC

EA = A + (PC)

i.e. get operand from A cells from current location pointed to by PC

c.f locality of reference & cache usage

Base-Register Addressing ( Displacement)

The base register could contain the start address of an array or vector, and the index could select the particular array element required. The processor may scale the index register to allow for the size of each array element. This could be used for accessing elements of an array passed as a parameter.

A- holds displacement

R- holds pointer to base address

R- may be explicit or implicit

Example: segment registers in 80x86

Indexed Addressing

This also requires space in an instruction for quite a large address. The address could be the start of an array or vector, and the index could select the particular array element required. The processor may scale the index register to allow for the size of each array element.

A = base

R = displacement

EA = A + R

Good for accessing arrays (iterative operations)

EA = A + R

R++ (increment R after each operation)

+------+-----+-----+--------------------------------+
   | load | reg |index|         address                | 
   +------+-----+-----+--------------------------------+
   
   (Effective address = address + contents of specified index register)

Stack Addressing

Operand is (implicitly) on top of stack
A stack is a reserved block of locations
e.g.
ADD
Pop top two items from stack and add

Instruction Formats

-Define the layout of the bits of an instruction, in terms of its constituent fields

-Must include an opcode and, implicitly or explicitly, indicate the addressing mode for each operand

-For most instruction sets more than one instruction format is used

For Instruction Length:

-Should be equal to the memory-transfer length or one should be a multiple of the other
-Should be a multiple of the character length, which is usually 8 bits, and of the length of fixed-point numbers

Instruction length can affected by : Memory size, Memory organization, Bus structure, CPU complexity, CPU ,speed .

Number of Addresses (a)

Zero- Addresses (0-operand)

so called stack machines: All arithmetic operations take place using the top one or two positions on the stack: push a, push b, add, pop c. For stack machines, the terms "0-operand" and "zero-address" apply to arithmetic instructions, but not to all instructions, as 1-operand push and pop instructions are used to access memory.

All addresses implicit
Uses a stack that is in a known location and often at least the top 2 elements are in processor registers.
e.g. push a
      push b
      add
      pop c

c = a + b

Example :-

Program to execute Y = (A-B) / (C+D*E)

0-Address

One-Address (1-operand)

so called accumulator machines, include early computers and many small microcontrollers: most instructions specify a single right operand (that is, constant, a register, or a memory location), with the implicit accumulator as the left operand (and the destination if there is one): load a, add b, store c. A related class is practical stack machines which often allow a single explicit operand in arithmetic instructions: push a, add b, pop c.

Implicit second address

Usually a register (accumulator)

Contains one of the operands and is used to store the result

Common on early machines

Example:-
Program to execute Y = (A-B) / (C+D*E)

1-Address

Two addresses (1-operand)

CISC — often load a,reg1; add reg1,b; store reg1,c on machines that are limited to one memory operand per instruction; this may be load and store at the same location
CISC — move a->c; add c+=b.
RISC — Requiring explicit memory loads, the instructions would be: load a,reg1; load b,reg2; add reg1,reg2; store reg2,c

One address doubles as operand and result

a = a + b

Reduces length of instruction

Requires some extra work

Temporary storage to hold some results


Example:-
Program to execute Y = (A-B) / (C+D*E)

2-Address

Three addresses (1-operand)


CISC — It becomes either a single instruction: add a,b,c, or more typically: move a,reg1; add reg1,b,c as most machines are limited to two memory operands.
RISC — arithmetic instructions use registers only, so explicit 2-operand load/store instructions are needed: load a,reg1; load b,reg2; add reg1+reg2->reg3; store reg3,c; unlike 2-operand or 1-operand, this leaves all three values a, b, and c in registers available for further reuse.

Operand 1, Operand 2, Result

a = b + c;

May be a forth - next instruction (usually implicit)

Not common

Needs very long words to hold everything

Example:-

Program to execute Y = (A-B) / (C+D*E)

3-Address

Instruction Representation

Within the computer, each instruction is represented by a sequence of bits. The instruction is divided into fields, corresponding to the constituent elements of the instruction. During instruction execution, an instruction is read into an instruction register (IR) in the CPU. The CPU must be able to extract the data from the various instruction fields to perform the required operation.

It is difficult for both the programmer and the reader of textbooks to deal with binary representations of machine instructions. Thus, it has become common prac­tice to use a symbolic representation of machine instructions. Opcodes are represented by abbreviations, called mnemonics, that indicate the operation. Common examples include

TABLE 1

ADD	Add
SUB	Subtract
MPY	Multiply
DIV	Divide
LOAD	Load data from memory
STOR	Store data to memory

Operands are also represented symbolically. For example, the instruction

ADD R, Y

may mean add the value contained in data location Y to the contents of register R. In this example. Y refers to the address of a location in memory, and R refers to a particular register. Note that the operation is performed on the contents of a loca­tion, not on its address.

Simple Instruction Format :

Instruction Type:

Data processing : Arithmetic and logic instructions
Data storage (main memory) : Memory instructions
Data movement (I/O) : I/O instructions
Program flow control : Test and branch instructions

Elements of machine Instruction

Each instruction must have elements that contain the information required by the CPU for execution. These elements are as follows

• Operation code: Specifies the operation to be performed (e.g.. ADD, I/O). The operation is specified by a binary code, known as the operation code, or opcode.
• Source operand reference: The operation may involve one or more source operands, that is, operands that are inputs for the operation.
• Result operand reference: The operation may produce a result.
• Next instruction reference: This tells the CPU where to fetch the next instruc­tion after the execution of this instruction is complete.

The next instruction to be fetched is located in main memory or, in the case of a virtual memory system, in either main memory or secondary memory (disk). In most cases, the next instruction to be fetched immediately follows the current instruction. In those cases, there is no explicit reference to the next instruction. Source and result operands can be in one of three areas:

• Main or virtual memory: As with next instruction references, the main or vir­tual memory address must be supplied.
• CPU register: With rare exceptions, a CPU contains one or more registers that may be referenced by machine instructions. If only one register exists, reference to it may be implicit. If more than one register exists, then each register is assigned a unique number, and the instruction must contain the number of the desired register.
• I/O device: The instruction must specify (he I/O module and device for the operation. If memory-mapped I/O is used, this is just another main or virtual memory address.

Introduction: Instruction Sets

What is Machine instruction set?

From the designer's point of view, the machine instruction set provides the functional requirements for the CPU: Implementing the CPU is a task that in large part involves implementing the machine instruction set.

From the user's side, the user who chooses to program in machine language (actually, in assembly language) becomes aware of the register and memory structure, the types of data directly supported by the machine, and the functioning of the ALU.

Machine instruction characteristic:


-The operation of the processor is determined by the instructions it executes, referred to as machine instructions or computer instructions

-The collection of different instructions that the processor can execute is referred to as the processor’s instruction set

-Each instruction must contain the information required by the processor for execution